{"id":"54307830-de34-449c-b201-fdde5d9c4ebc","title":"RTL Design Engineer","company":{"id":"6cc73240-2fbe-496a-8b71-0427d8086855","name":"AMD","website":"https://careers.amd.com","url":"https://yesjob-web.pages.dev/companies/6cc73240-2fbe-496a-8b71-0427d8086855"},"url":"https://yesjob-web.pages.dev/jobs/54307830-de34-449c-b201-fdde5d9c4ebc","apply_url":"https://canadacareers-amd.icims.com/jobs/87376/login","status":"open","location":"Markham, Ontario, Canada","locations":[{"city":"Markham","region":"ON","country":"CA"}],"workplace":null,"remote_eligible_countries":[],"employment_types":["full_time"],"work_auth_required":"unspecified","term":null,"salary_cad_per_year":null,"languages_required":[],"seniority":null,"first_seen_at":"2026-11-05T21:24:52.403Z","last_seen_at":"2026-11-10T05:57:51.825Z","salary_text":null,"summary":"- Full-time RTL Design Engineer role on AMD's Security IP (SECIP) team, covering block-level RTL and/or MP subsystem integration for embedded security, crypto, DMA and power-management IP.\n- Location: Markham, ON, Canada. No remote or hybrid arrangement is stated, so assume onsite unless confirmed.\n- Requires a Bachelor's or Master's in electrical/computer engineering, computer science or a related field; Master's preferred. Strong Verilog/SystemVerilog, scripting and AXI/AHB bus knowledge expected.\n- No work authorization, salary, or years-of-experience requirements are stated in the posting.","sources":["https://careers.amd.com/jobs/87376"]}